14 February 2027 · In person
Silicon day: circuits and memory
San Francisco Marriott Marquis, San Francisco, CA — alongside ISSCC 2027
Circuit-level advances and the verification burden they create, on the ISSCC opening day.
Process, design, packaging, EDA and the software stack that keeps modern fabs running — anchored in the Central Texas chip belt.
Cadence
Every six weeks
Meeting pattern
Thursday evenings on a six-week cycle, 18:00–20:00 CT
Home venue
Texas Advanced Computing Center, J.J. Pickle Research Campus, Austin, TX
Format
In person, with quarterly fab and lab site visits
Members
2,140
Founded
2021
Chair
Dr Priya Raghunathan
Role
Chair, Semiconductors & Hardware Specialist Group
14 February 2027 · In person
San Francisco Marriott Marquis, San Francisco, CA — alongside ISSCC 2027
Circuit-level advances and the verification burden they create, on the ISSCC opening day.
30 March 2027 · In person
Phoenix Convention Center, Phoenix, AZ — alongside SEMICON West 2027
Yield analytics and the technician-to-engineer pipeline across the US fab build-out.
11 July 2027 · In person
San Jose Convention Center, San Jose, CA — alongside 64th Design Automation Conference
EDA, verification and the machine learning now embedded in design flows.